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DERNIERS DÉPÔTS - LATEST DOCUMENTS
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Hugo Reymond, Abderaouf Nassim Amalou, Isabelle Puaut. WORTEX: Worst-Case Execution Time and Energy Estimation in Low-Power Microprocessors using Explainable ML. WCET 2024 - 22nd International Workshop on Worst-Case Execution Time Analysis, Thomas Carle, Jul 2024, Lille, France. pp.1:1-1:14. ⟨hal-04646477⟩
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Gilles Bourgoin, Jocelyn Poissant, Janneke Wit, Kathreen Ruckstuhl, Camille Beaumelle, et al.. Parasitic nematode abundance and diversity variation in bighorn sheep populations across southwestern Canada. 28th International Conference of the World Association for the Advancement of Veterinary Parasitology, Jul 2021, Dublin (Virtual), Ireland. ⟨hal-04629830⟩
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Riyane Sid Lakhdar, Henri-Pierre Charles, Maha Kooli. Data-layout optimization based on Memory-Access-Pattern analysis for Source-Code Performance improvement. SCOPES 2020 - 23rd International Workshop on Software and Compilers for Embedded Systems, May 2020, Sankt Goar, Germany. ⟨10.1145/3378678.3391874⟩. ⟨cea-04505334⟩
Pour toute question : hal@cea.fr
Nombre de textes intégraux
345
Nombre de notices sans document
317
Indicateur d'Open Access
59 %
EVOLUTION DES RESSOURCES
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Quantum computing
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ECC
RRAM
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In-memory computing
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Diagnosis
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Cryptography
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Convolutional neural networks
Design
Random access storage
Compiler
Spiking neural network
Artificial intelligence
Image processing
Timing circuits
Computation theory
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Fault detection
Microarchitecture
Flip flop circuits
8T SRAM cell
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Chiplet
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